0:# INIT TABLES
   1:# INIT VARS
   2:if not '$once_0_INIT_VARS' {
   3:    set bit '$once_0_INIT_VARS'
   4:    let var 'Ctempo' := 0
   5:    let var 'Conta' := 0
   6:}
  12:# 
  13:# ======= START RUNG 1 =======
  14:LabelRung1:
  15:
  16:set bit '$rung_top'
  18:# start series [
  19:# ELEM_CONTACTS
  20:if not 'Xcelulaentrada' {
  21:    clear bit '$rung_top'
  22:}
  24:# ELEM_ONE_SHOT_RISING
  25:if '$rung_top' {
  26:    if '$once_1_ONE_SHOT_RISING' {
  27:        clear bit '$rung_top'
  28:    } else {
  29:        set bit '$once_1_ONE_SHOT_RISING'
  30:    }
  31:} else {
  32:    clear bit '$once_1_ONE_SHOT_RISING'
  33:}
  35:# ELEM_CTU
  36:if '$rung_top' {
  37:    if not '$once_2_CTU_Ctempo' {
  38:        set bit '$once_2_CTU_Ctempo'
  39:        if 'Ctempo' < '1' {
  40:            increment 'Ctempo'
  41:        }
  42:    }
  43:} else {
  44:    clear bit '$once_2_CTU_Ctempo'
  45:}
  46:if 'Ctempo' < '1' {
  47:    clear bit '$rung_top'
  48:} else {
  49:    set bit '$rung_top'
  50:}
  52:# ELEM_COIL
  53:let bit 'Yinterno' := '$rung_top'
  55:# ] finish series
  56:# 
  57:# ======= START RUNG 2 =======
  58:LabelRung2:
  59:
  60:set bit '$rung_top'
  62:# start series [
  63:# ELEM_CONTACTS
  64:if not 'Yinterno' {
  65:    clear bit '$rung_top'
  66:}
  68:# ELEM_CONTACTS
  69:if 'Rdesliga' {
  70:    clear bit '$rung_top'
  71:}
  73:# ELEM_TON Tliga 6000000
  74:if '$rung_top' {
  75:    if 'Tliga' < '599' {
  76:        clear bit '$rung_top'
  77:        increment 'Tliga'
  78:    }
  79:} else {
  80:    let var 'Tliga' := 0
  81:}
  83:# ELEM_COIL
  84:let bit 'Rsinal' := '$rung_top'
  86:# ] finish series
  87:# 
  88:# ======= START RUNG 3 =======
  89:LabelRung3:
  90:
  91:set bit '$rung_top'
  93:# start series [
  94:# ELEM_CONTACTS
  95:if not 'Rsinal' {
  96:    clear bit '$rung_top'
  97:}
  99:# start parallel [
 100:let bit '$parThis_0' := '$rung_top'
 101:# ELEM_CTC
 102:if '$parThis_0' {
 103:    clear bit '$parThis_0'
 104:    if not '$once_3_CTC_Conta' {
 105:        set bit '$once_3_CTC_Conta'
 106:        increment 'Conta'
 107:        if 'Conta' > '3' {
 108:            let var 'Conta' := 0
 109:            set bit '$parThis_0'
 110:        }
 111:    }
 112:} else {
 113:    clear bit '$once_3_CTC_Conta'
 114:}
 116:let bit '$parThis_0' := '$rung_top'
 117:# ELEM_COIL
 118:let bit 'Rdesliga' := '$parThis_0'
 120:# ] finish parallel
 121:# ] finish series
 122:# 
 123:# ======= START RUNG 4 =======
 124:LabelRung4:
 125:
 126:set bit '$rung_top'
 128:# start series [
 129:# ELEM_EQU
 130:if '$rung_top' {
 131:    if 'Conta' != '3' {
 132:        clear bit '$rung_top'
 133:    }
 134:}
 136:# ELEM_RES
 137:if '$rung_top' {
 138:    let var 'Ctempo' := 0
 139:}
 141:# ] finish series
 142:LabelRung5:
 143:
 144:# Latest INT_OP here